Datasheet

458
32117D–AVR-01/12
AT32UC3C
23.6.2 Advanced Operation
23.6.2.1 Peripheral I/O Pin Control
When a GPIO pin is assigned to a peripheral function, i.e. the corresponding bit in GPER is zero,
output and output enable is controlled by the selected peripheral pin. In addition the peripheral
may control some or all of the other GPIO pin functions listed in Table 23-1, if the peripheral sup-
ports those features. All pin features not controlled by the selected peripheral is controlled by the
GPIO.
Refer to the Module Configuration section for details regarding implemented GPIO pin functions
and to the Peripheral chapter for details regarding I/O pin function control.
23.6.2.2 Pull-up Resistor, Pull-down Resistor Control
Pull-up and pull-down can be configured for each GPIO pin. Pull-up allows the pin and any con-
nected net to be pulled up to VDD if the net is not driven. Pull-down pulls the net to GND.
Pull-up and pull-down are useful for detecting if a pin is unconnected or if a mechanical button is
pressed, for various communication protocols and to keep unconnected pins from floating.
Pull-up can be enabled and disabled by writing a one and a zero respectively to the correspond-
ing bit in the Pull-up Enable Register (PUER). Pull-down can be enabled and disabled by writing
a one and a zero respectively to the corresponding bit in the Pull-down Enable Register (PDER).
23.6.2.3 Output Pin Timings
Figure 23-3 shows the timing of the GPIO pin when writing to the Output Value Register (OVR).
The same timing applies when performing a ‘set’ or ‘clear’ access, i.e. writing to OVRS or
OVRC. The timing of PVR is also shown.
Figure 23-3. Output Pin Timings
Table 23-1. I/O Pin function Control
Function name GPIO mode Peripheral mode
Output OVR Peripheral
Output enable ODER Peripheral
Pull-up PUER Peripheral if supported, else GPIO
Pull-down PDER Peripheral if supported, else GPIO
Drive strength ODCRn Peripheral if supported, else GPIO
PB Access
PB Access
CLK_GPIO
Write OVR to 1
Write OVR to 0
OVR / I/O Line
PVR