Datasheet

417
32117D–AVR-01/12
AT32UC3C
21.7.1 Control Register
Name: CR
Access Type: Read/Write
Offset: 0x00
Reset Value: 0x000000000
• ARB: Arbitration Mode
0: The MDMA is in Fixed Priority Mode.
1: The MDMA is in Round-Robin Mode.
• CHxDIS: Channel Disable
Writing a zero to this bit has no effect.
Writing a one to this bit disables the MDMA channel after the current transfer has completed.
To avoid hazards, CHxDIS bits can only be changed by writing a value to CR where the corresponding CHxEN bit is set.
This bit is automatically cleared by hardware when the corresponding channel has been disabled.
• CHxM: Channel Mode
0: The channel is in Single Transfer Mode.
1: The channel is in Descriptor Mode.
To avoid hazards, CHxM bits can only be changed by writing a value to CR where the corresponding CHxEN bit is set.
• CHxEN: Channel Enable
Writing a zero to this bit this bit has no effect.
Writing a one to this bit enables the channel for DMA transfer.
This bit is automatically cleared if the transfer completes when the channel is in single transfer mode.
This bit is automatically cleared if the transfer completes when the channel is in descriptor mode, and the next descriptor read in
has a cleared Valid bit.
This bit is automatically cleared when the corresponding channel has been disabled by writing a one to CHxDIS.
31 30 29 28 27 26 25 24
-------ARB
23 22 21 20 19 18 17 16
----CH3DISCH2DISCH1DISCH0DIS
15 14 13 12 11 10 9 8
----CH3MCH2MCH1MCH0M
76543210
----CH3ENCH2ENCH1ENCH0EN