Datasheet

305
32117D–AVR-01/12
AT32UC3C
Note: 1. NWE1 enables upper byte writes. NWE0 enables lower byte writes.
2. NBS1 enables upper byte writes. NBS0 enables lower byte writes.
NRD OE OE OE
NWE0 WE WE
(1)
WE
NWE1 – WE
(1)
NBS1
(2)
Table 17-5. EBI Pins and External Devices Connections
Pins name
Pins of the
Interfaced
Device
SDRAM
Controller SDRAMC
DATA[7:0] D[7:0]
DATA[15:8] D[15:8]
ADDR[0] DQM0
ADDR[10:2] A[8:0]
ADDR[11] A[9]
SDA10 A[10]
ADDR[14:13] A[12:11]
ADDR[16] BA0
ADDR[17] BA1
NCS[1] CS
NWE1 DQM1
SDCK CLK
SDCKE CKE
RAS RAS
CAS CAS
SDWE WE
Table 17-4. EBI Pins and External Static Devices Connections (Continued)
Pins name
Pins of the Interfaced Device
8-bit Static
Device
2 x 8-bit
Static
Devices
16-bit Static
Device
Controller SMC