Datasheet

303
32117D–AVR-01/12
AT32UC3C
17.5 Product Dependencies
In order to use this module, other parts of the system must be configured correctly, as described
below.
17.5.1 I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with I/O Con-
troller lines. The user must first configure the I/O Controller to assign the EBI pins to their
peripheral functions.
17.5.2 Power Management
To prevent bus errors EBI operation must be terminated before entering sleep mode.
17.5.3 Clocks
According to the external devices addressed, the following table gives the clocks that should be
enabled by the Power Manager.
17.5.4 Interrupts
The EBI interface has one interrupt line connected to the Interrupt Controller:
• SDRAMC_IRQ: Interrupt signal coming from the SDRAMC
Handling the EBI interrupt requires configuring the interrupt controller before configuring the EBI.
17.5.5 HMATRIX
The EBI interface is connected to the HMATRIX Special Function Register 6 (SFR6). The user
must first write to this HMATRIX.SFR6 to configure the EBI correctly.
Table 17-2. EBI Clocks Configuration
Clocks name Clocks type
Type of the Interfaced Device
SDRAM
SRAM, PROM,
EPROM,
EEPROM, Flash
CLK_EBI
HSB (clock reference, data sampling
and data transfer through HSB)
XX
CLK_SDRAMC PB (Register access) X
CLK_SMC PB (Register access) X
Table 17-3. EBI Special Function Register Fields Description
SFR6 Bit
Number Bit name Description
[31:2] Reserved
1CS1A
0 = Chip Select 1 (NCS[1]) is connected to a Static Memory device. For each
access to the NCS[1] memory space, all related pins act as SMC pins
1 = Chip Select 1 (NCS[1]) is connected to a SDRAM device. For each access
to the NCS[1] memory space, all related pins act as SDRAM pins (SDCS)
0 Reserved