Datasheet

257
32117D–AVR-01/12
AT32UC3C
Figure 15-1. Memory Map for the Flash Memories2
15.4.6 High Speed Read Mode
The flash provides a High Speed Read Mode, offering slightly higher flash read speed at the
cost of higher power consumption. Two dedicated commands, High Speed Read Mode Enable
(HSEN) and High Speed Read Mode Disable (HSDIS) control the speed mode. The High Speed
Mode (HSMODE) in Flash Status Register (FSR) shows which mode the flash is in. After reset,
the High Speed Mode is disabled, and must be manually enabled if the user wants to.
Refer to the Electrical Characteristics chapter at the end of this datasheet for details on the max-
imum clock frequencies in Normal and High Speed Read Mode.
0
pw
0x0080 0200
REservedFlash data array
Factory Page
User Page
Flash with extra pages
0x0080 0000
All addresses are byte addresses
Flash base address
Offset from
base address