Datasheet

252
32117D–AVR-01/12
AT32UC3C
14.8 Module Configuration
The specific configuration for each PEVC instance is listed in the following tables. The module
bus clocks listed here are connected to the system bus clocks. Refer to the Power Manager
chapter for details.
The BUSY0[21:16] field will always be read as 0x3F.
The PEVC routes events from event generator to trigger an action in the event user. The follow-
ing tables defines the corresponding input event generator in EVMx registers and if an event
shaper is implemented for this generator.
Table 14-3. Module Configuration
Feature Parameter PEVC
Number of Generators EVIN 34
Number of Event Shapers EVS 24
Number of Channels / Users TRIGOUT 22
Table 14-4. Module Clock Name
Module name Clock name Description
PEVC CLK_PEVC HSB clock
Table 14-5. Register Reset Values
Register Reset Value
BUSY0 0x0000FFFF
VERSION 0x00000100
PARAMETER Refer to Table 14-3
Table 14-6. PEVC event numbers
Event Number (EVMx) Event Generator - Event source Event Shaper
[15:0]
PAD_EVT[15:0] - change on input
pins
Ye s
16 the generic clock GCLK7 Yes
17 the generic clock GCLK8 Yes
18 TC0 - A0 rising edge Yes
19 TC0 - A1 rising edge Yes
20 TC0 - A2 rising edge Yes
21 TC0 - B0 rising edge Yes
22 TC0 - B1 rising edge Yes
23 TC0 - B2 rising edge Yes
24 ACIFA0 - event 0
25 ACIFA0 - event 1