Datasheet

172
32117D–AVR-01/12
AT32UC3C
10.6.3 Status Register
Name: SR
Access Type: Read-only
Offset: 0x008
Reset Value: 0x00000003
• CLEARED: WDT Counter Cleared
This bit is cleared when writing a one to the CLR.WDTCLR bit.
This bit is set when clearing the WDT counter is done.
• WINDOW: Within Window
This bit is cleared when the WDT counter is inside the TBAN period.
This bit is set when the WDT counter is inside the PSEL period.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
------CLEAREDWINDOW