Datasheet

141
32117D–AVR-01/12
AT32UC3C
9.5.7 Synchronization
As the prescaler and counter operate asynchronously from the user interface, the AST needs a
few clock cycles to synchronize values written to the CR, CV, SCR, WER, EVE, EVD, PIRx, ARx
and DTR registers. The Busy bit in the Status Register (SR.BUSY) indicates that the synchroni-
zation is ongoing. During this time, writes to these registers will be discarded.
Note that synchronization takes place also if the prescaler is clocked from CLK_AST.