Datasheet

133
32117D–AVR-01/12
AT32UC3C
8.7 Module Configuration
The specific configuration for each SCIF instance is listed in the following tables. The module
bus clocks listed here are connected to the system bus clocks. Please refer to the Power Man-
ager chapter for details.
Table 8-13. SCIF Clock Name
Module name Clock Name Description
SCIF CLK_SCIF Peripheral Bus clock from the PBA clock domain
Table 8-14. Register Reset Values
Register Reset Value
PLLVERSION 0x00000100
OSCVERSION 0x00000101
BODVERSION 0x00000101
BODBVERSION 0x00000100
VREGVERSION 0x00000100
RCCRVERSION 0x00000100
RCCR8VERSION 0x00000100
OSC32VERSION 0x00000100
TSENSVERSION 0x00000100
RC120MIFAVERSION 0x00000100
GPLPVERSION 0x00000110
GCLKVERSION 0x00000100
VERSION 0x00000101