Datasheet

1306
32117D–AVR-01/12
AT32UC3C
Table of Content
1 Description ............................................................................................... 3
2 Overview ................................................................................................... 5
2.1 Block diagram ....................................................................................................5
2.2 Configuration Summary .....................................................................................6
3 Package and Pinout ................................................................................. 8
3.1 Package .............................................................................................................8
3.2 Peripheral Multiplexing on I/O lines .................................................................11
3.3 Signals Description ..........................................................................................18
3.4 I/O Line Considerations ...................................................................................24
4 Processor and Architecture .................................................................. 25
4.1 Features ..........................................................................................................25
4.2 AVR32 Architecture .........................................................................................25
4.3 The AVR32UC CPU ........................................................................................26
4.4 Programming Model ........................................................................................30
4.5 Exceptions and Interrupts ................................................................................34
5 Memories ................................................................................................ 39
5.1 Embedded Memories ......................................................................................39
5.2 Physical Memory Map .....................................................................................40
5.3 Peripheral Address Map ..................................................................................41
5.4 CPU Local Bus Mapping .................................................................................43
6 Supply and Startup Considerations ..................................................... 46
6.1 Supply Considerations .....................................................................................46
6.2 Startup Considerations ....................................................................................49
7 Power Manager (PM) .............................................................................. 50
7.1 Features ..........................................................................................................50
7.2 Overview ..........................................................................................................50
7.3 Block Diagram .................................................................................................51
7.4 I/O Lines Description .......................................................................................51
7.5 Product Dependencies ....................................................................................51
7.6 Functional Description .....................................................................................52
7.7 User Interface ..................................................................................................59
7.8 Module Configuration ......................................................................................81