Datasheet

1245
32117D–AVR-01/12
AT32UC3C
39.6.8.6 BAUD_RATE
The current baud rate in the AW. See Section 39.6.6.7 for more details.
39.6.8.7 STATUS_INFO
A status message from AW.
39.6.8.8 MEMORY_SPEED
Counts the number of RC120M clock cycles it takes to sync one message to the SAB interface
and back again. The SAB clock speed ( ) can be calculated using the following formula:
Table 39-54. MEMORY_READWRITE_STATUS Details
Response Details
Response value 0xC2
Additional data Status byte and byte count (2 bytes)
Table 39-55. BAUD_RATE Details
Response Details
Response value 0xC3
Additional data Baud rate
Table 39-56. STATUS_INFO Contents
Bit number Name Description
15-9 Reserved
8Protected
The protection bit in the internal flash is set. SAB access is restricted. This bit
will read as one during reset.
7 SAB busy
The SAB bus is busy with a previous transfer. This could indicate that the CPU
is running on a very slow clock, the CPU clock has stopped for some reason
or that the part is in constant reset.
6 Chip erase ongoing The Chip erase operation has not finished.
5 CPU halted This bit will be set if the CPU is halted. This bit will read as zero during reset.
4-1 Reserved
0 Reset status This bit will be set if AW has reset the CPU using the RESET command.
Table 39-57. STATUS_INFO Details
Response Details
Response value 0xC4
Additional data 2 status bytes
f
sab
f
sab
3f
aw
CV 3–
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