Datasheet

1175
32117D–AVR-01/12
AT32UC3C
37.8 Module Configuration
The specific configuration for each DACIFB instance is listed in the following tables. The module
bus clocks listed here are connected to the system bus clocks. Please refer to the Power Man-
ager chapter for details.
Table 37-3. DACIFB Configuration
Feature DACIFB0 DACIFB1
GOC.GCR size 8-bit 8-bit
GOC.OCR size 9-bit 9-bit
Table 37-4. DACIFB Clock Name
Module Name Clock Name Description
DACIFB0 CLK_DACIFB0 Peripheral Bus clock from the PBA clock domain
DACIFB1 CLK_DACIFB1 Peripheral Bus clock from the PBA clock domain
Table 37-5. Register Reset Values
Register Reset Value
VERSION 0x00000110