Datasheet

1169
32117D–AVR-01/12
AT32UC3C
37.7.12 Data Register Channel 0
Name:
DR0
Access Type: Read/Write
Offset: 0x2C
Reset Value: 0x00000000
• DCB: DAC Data Channel B
The right-aligned 12-bit value to be converted on channel B, when the DDA bit within the CFR register is activated. This allows
conversions on both channels in a single register write cycle. When DDA is deactivated this field is ignored, and the data to be
converted on channel B should then be written to the DR1 register.
• DCA: DAC Data Channel A
The right-aligned 12-bit value to be converted on channel A.
31 30 29 28 27 26 25 24
DCB
23 22 21 20 19 18 17 16
DCB
15 14 13 12 11 10 9 8
DCA
76543210
DCA