Datasheet

1168
32117D–AVR-01/12
AT32UC3C
37.7.11 Data Register Control Channel B
Name:
DRCB
Access Type: Read/Write
Offset: 0x28
Reset Value: 0x00000001
• DSD: DAC Data Shift Direction
0: DAC input value to be converted is right aligned
1: DAC input value to be converted is left aligned.
• DSV: DAC Data Shift Value
The number of left or right shifts to be performed on the 16-bits data word before being fed to the DAC.
Up to 4 left shifts and 4 right shifts are possible. Set bit 3 to obtain a left shift, leave it de-asserted to perform a right shift.
• DRN: DAC Data Rounding Enable
0: No rounding
1: rounding with right shifting is enabled. This adds "1" to the LSB before the last right shift. This feature is enabled by default.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
----DSD DSV
76543210
-------DRN