Datasheet

1155
32117D–AVR-01/12
AT32UC3C
37.7 User Interface
Table 37-2. DACIFB Register Memory Map
Offset Register Register Name Access Reset
0x00 Control Register CR Read/Write 0x00000000
0x04 Configuration Register CFR Read/Write 0x00000000
0x08 Event Input Control Register ECR Read/Write 0x00000000
0x0C Timing Control Register TCR Read/Write 0x00000000
0x10 Interrupt Enable Register IER Write-only -
0x14 Interrupt Disable Register IDR Write-only -
0x18 Interrupt Mask Register IMR Read-only 0x00000000
0x1C Status Register SR Read-only 0x00000000
0x20 Status Clear Register SCR Write-only -
0x24 Data Register Control Channel A DRCA Read/Write 0x00000001
0x28 Data Register Control Channel B DRCB Read/Write 0x00000001
0x2C Data Register 0 DR0 Read/Write 0x00000000
0x30 Data Register 1 DR1 Read/Write 0x00000000
0x34
Gain and Offset Calibration
Register
GOC Read/Write 0x00000000
0x38 Timer Register Channel A TRA Read/Write 0x00000000
0x3C Timer Register Channel B TRB Read/Write 0x00000000
0x40 Version Register VERSION Read-only -
(1)
1. The reset value for this register is device specific. Please refer to the Module Configuration section at the end of this chapter.