Datasheet

1147
32117D–AVR-01/12
AT32UC3C
The following table defines the valid settings for the CONV field of the INPSELxy and INNSELxy
registers in the ADCIFA. This setting defines the mapping of the ADC input voltage.
Table 36-16. INP0/1 selection
INPSEL00[CONVi],
INPSEL10[CONVi],
INPSEL01[CONVi],
INPSEL11[CONVi] Name Connection
0 ADCIN0 See Peripheral Multiplexing on I/O line
chapter
1 ADCIN1
2 ADCIN2
3 ADCIN3
4 ADCIN4
5 ADCIN5
6 ADCIN6
7 ADCIN7
8 DAC0_int Internal output of the DAC0
10 GNDANA Analog Ground
Table 36-17. INN0/1 selection
INNSEL00[CONVi],
INNSEL10[CONVi],
INNSEL01[CONVi],
INNSEL11[CONVi] Name Connection
0 ADCIN8 See Peripheral Multiplexing on I/O line
chapter
1 ADCIN9
2 ADCIN10
3 ADCIN11
4 ADCIN12
5 ADCIN13
6 ADCIN14
7 ADCIN15
8 DAC1_int Internal output of the DAC1
9 GNDANA Analog Ground
Table 36-18. External Reference selection
RS Name Connection
0 Internal 1V reference
1 Internal 0.6*VDDANA reference
2 ADCREF0
See Peripheral Multiplexing
on I/O line chapter
3 ADCREF1