Datasheet

1142
32117D–AVR-01/12
AT32UC3C
36.7.20 Interrupt Mask Register
Name:
IMR
Access Type: Read-only
Offset: 0x78
Reset Value: 0x00000000
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
A bit in this register is cleared when the corresponding bit in IDR is written to one.
A bit in this register is set when the corresponding bit in IER is written to one.
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
--- ----
15 14 13 12 11 10 9 8
- SUTD MSOC1 MSOC0 WM1 WM0 - -
76543210
LOVR1 OVR1 SEOC1 SEOS1 LOVR0 OVR0 SEOC0 SEOS0