Datasheet

1124
32117D–AVR-01/12
AT32UC3C
• WM0: Window Monitor 0
This bit is set when the watched result value goes to the defined window.
This bit is cleared when the corresponding bit in SCR is written to one.
• LOVR1: Sequencer 1 Last Converted Value Overrun
This bit is set when an overrun error occurs on the LCV register.
This bit is cleared when the corresponding bit in SCR is written to one.
• OVR1: Sequencer 1 Overrun Error
This bit is set when an overrun error occurs.
This bit is cleared when the corresponding bit in SCR is written to one.
• SEOC1: Sequencer 1 End Of Conversion
This bit is set when an end of conversion occurs.
This bit is cleared when the corresponding bit in SCR is written to one.
• SEOS1: Sequencer 1 End Of Sequence
This bit is set when an end of sequence occurs.
This bit is cleared when the corresponding bit in SCR is written to one.
• LOVR0: Sequencer 0 Last Converted Value Overrun
This bit is set when an overrun error occurs on the LCV register.
This bit is cleared when the corresponding bit in SCR is written to one.
• OVR0: Sequencer 0 Overrun Error
This bit is set when an overrun error occurs.
This bit is cleared when the corresponding bit in SCR is written to one.
• SEOC0: Sequencer 0 End Of Conversion
This bit is set when an end of conversion occurs.
This bit is cleared when the corresponding bit in SCR is written to one.
• SEOS0: Sequencer 0 End Of Sequence
This bit is set when an end of sequence occurs.
This bit is cleared when the corresponding bit in SCR is written to one.