Datasheet

1121
32117D–AVR-01/12
AT32UC3C
36.7.2 Configuration Register
Name:
CFG
Access Type: Read/Write
Offset: 0x04
Reset Value: 0x00000000
It is adviced not changing the configuration once the module is enabled. In order to do so, first turn off the module by writ-
ting a 0 in CFG.ADCEN, then change the configuration.
• SUT: Start-up Time
Number of ADC clock cycles to wait for: (STARTUP + 1) * 32.
• MUXSET: Mux Settle Time
1: The multiplexers settle time is set to 1.5 PB clock periods.
0: The multiplexers settle time is set to 0.5 PB clock periods.
• EXREF: External Reference
1: The external forcing of references is enabled, ADC references are the ADCREFN and ADCREFP pads.
0: The external forcing of references is disabled, ADC reference is given by the RS field.
• SHD: Sample-and-Hold Disabled
1: The Sample and Hold is disabled.
0: The Sample and Hold is enabled.
note: when set to one, sequencer 1 is turned off, as a consequence the ADC pipeline latency is decreased by one ADC clock
period.
• RS: Reference Source
0: Internal 1V reference.
1: Internal 0.6 *VDDANA reference.
2: External reference ADCREF0 over chip analog ground.
3: External reference ADCREF1 over chip analog ground.
• FRM: Free Running Mode
31 30 29 28 27 26 25 24
--------
23 22 21 20 19 18 17 16
-- SUT
15 14 13 12 11 10 9 8
- - - - - MUXSET EXREF -
76543210
SHD RS FRM SSMQ SLEEP - ADCEN