Datasheet

1099

32117D–AVR-01/12

AT32UC3C

35.8 Module configuration

The specific configuration for each ACIFA instance is listed in the following tables. The module

bus clocks listed here are connected to the system bus clocks according to the table in the Sys-

tem Bus Clock Connections section.

The following table gives which ACIFA module controls the analog comparators.

The inputs of the AC are configured through the CONFA and CONFB registers. The configura-

tion allows to select pin or internal voltage from the DACs.

The following table defines the valid settings for the CONFA and CONFB registers for each

ACIFA instance. This setting defines the mapping of the AC input voltage.

Table 35-3. Module clock name

Module name Clock name Description

ACIFA0 CLK_ACIFA0 Peripheral Bus clock from the PBA clock domain

ACIFA1 CLK_ACIFA1 Peripheral Bus clock from the PBA clock domain

Table 35-4. Register Reset Values

VERSION 0x00000100

Table 35-5. Analog comparators controlled by ACIFA

Module name Analog comparator name

ACIFA0 AC0A and AC0B

ACIFA1 AC1A and AC1B

Table 35-6. v

of AC0A selection

CONFA[INSELP] Name Connection

0 AC0AP0 See Peripheral Multiplexing on I/O line

chapter

1 AC0AP1

2 DAC0_int Internal output of the DAC0