Datasheet

1068
32117D–AVR-01/12
AT32UC3C
34.7.9 Interrupt Mask Register
Name:
IMR
Access Type: Read-only
Offset: 0x24
Reset Value: 0x00000000
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
A bit in this register is cleared when the corresponding bit in IDR is written to one.
A bit in this register is set when the corresponding bit in IER is written to one.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
––––––TRIGGERQDERR
76543210
OVR DIRINV IDXERR RCRO PCRO CAP CMP QEPI