Datasheet

1057
32117D–AVR-01/12
AT32UC3C
34.7 User Interface
Table 34-2. QDEC Register Memory Map
Offset Register Register Name Access Reset
0x00 Control Register CTRL Read/Write 0x00000000
0x04 Configuration Register CF Read/Write 0x00000000
0x08 Counter Register CNT Read/Write 0x00000000
0x0C Top Value Register TOP Read/Write 0x00000000
0x10 Compare Register CMP Read/Write 0x00000000
0x14 Capture Register CAP Read-only 0x00000000
0x18 Status Register SR Read-only 0x00000000
0x1C Status Clear Register SCR Write-only 0x00000000
0x20 Interrupt Mask Register IMR Read-only 0x00000000
0x24 Interrupt Enable Register IER Write-only 0x00000000
0x28 Interrupt Disable Register IDR Write-only 0x00000000
0x2C Parameter Register PARAMETER Read-only -
(1)
0x30 Version Register VERSION Read-only -
(1)
1. The reset values for this register is device specific. Please refer to the Module Configuration section at the end of this chapter.