Datasheet

1046
32117D–AVR-01/12
AT32UC3C
33.7.44 Channel Dead Time Update Register
Name:
DTUPD
Access Type: Write-only
Offset: 0x21C + [ch_num * 0x20]
Reset Value: -
This register can only be written if the WPSWS4 and WPHWS4 bits are cleared in ”Write Protect Status Register” on page
1030.
This register acts as a double buffer for the DTH and DTL values. This prevents an unexpected waveform when modifying
the dead-time values.
Only the first 16 bits (dead-time counter size) of DTHUPD and DTLUPD fields are significant.
• DTLUPD: Dead-Time Value Update for PWMLx Output
Defines the dead-time value for PWMLx output. This value must be defined between 0 and CDTY (CDTYx). This value is
applied only at the beginning of the next channel x PWM period.
• DTHUPD: Dead-Time Value Update for PWMHx Output
Defines the dead-time value for PWMHx output. This value must be defined between 0 and CPRD-CDTY (CPRx and CDTYx).
This value is applied only at the beginning of the next channel x PWM period.
31 30 29 28 27 26 25 24
DTLUPD
23 22 21 20 19 18 17 16
DTLUPD
15 14 13 12 11 10 9 8
DTHUPD
76543210
DTHUPD