Datasheet

1035
32117D–AVR-01/12
AT32UC3C
33.7.36 PWM Comparison x Mode Update Register
Name:
CMPxMUPD
Access Type: Write-only
Offset: 0x13C + [x * 0x10]
Reset Value: -
This register acts as a double buffer for the CEN, CTR, CPR and CUPR values. This prevents an unexpected comparison
x match.
• CUPRUPD: Comparison x Update Period Update
Defines the time between each update of the comparison x mode and the comparison x value. This time is equal to CUPR+1
periods of the channel 0 counter.
• CPRUPD: Comparison x Period Update
Defines the maximum value of the comparison x period counter (CPRCNT). The comparison x value is performed periodically
once every CPR+1 periods of the channel 0 counter.
• CTRUPD: Comparison x Trigger Update
The comparison x is performed when the value of the comparison x period counter (CPRCNT) reaches the value defined by
CTR.
• CENUPD: Comparison x Enable Update
0: The comparison x is disabled and can not match.
1: The comparison x is enabled and can match.
31 30 29 28 27 26 25 24
- -------
23 22 21 20 19 18 17 16
---- CUPRUPD
15 14 13 12 11 10 9 8
- - - - CPRUPD
76543210
CTRUPD - - - CENUPD