Datasheet

1033

32117D–AVR-01/12

AT32UC3C

33.7.34 Comparison x Value Update Register

Name:

CMPxVUPD

Access Type: Write-only

Offset: 0x134 + [x * 0x10]

Reset Value: -

This register acts as a double buffer for the CV and CVM values. This prevents an unexpected comparison x match.

Only the first 20 bits (channel counter size) of CV

UPD field are significant.

• CVMUPD: Comparison x Value Mode Update

0: The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is

incrementing.

1: The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is

decremented.

Note: This bit is useless if the counter of the channel 0 is left aligned (CALG=0 in ”Channel Mode Register” on page 1036)

• CVUPD: Comparison x Value Update

Defines the comparison x value to be compared with the counter of the channel 0.

CAUTION: to be taken into account, the write of the CMPxVUPD register must be followed by a write of the CMPxMUPD

31 30 29 28 27 26 25 24

- ------CVMUPD

23 22 21 20 19 18 17 16

CVUPD

15 14 13 12 11 10 9 8

CVUPD

76543210

CVUPD