Datasheet
1008
32117D–AVR-01/12
AT32UC3C
33.7.10 Sync Channels Update Control Register
Name:
SCUC
Access Type: Read/Write
Offset: 0x028
Reset Value: 0x00000000
• UPDULOCK: Synchronous Channels Update Unlock
0: No effect
1: If the UPDM field is set to “0” in ”Sync Channels Mode Register” on page 1006, writing the UPDULOCK bit to one will trigger
the update of the period value, the duty-cycle and the dead-time values of synchronous channels at the beginning of the next
PWM period. If the UPDM field is set to “1” or “2”, writing the UPDULOCK bit to one will trigger only the update of the period
value and the dead-time values of synchronous channels.
This bit is automatically reset when the update is done.
31 30 29 28 27 26 25 24
- -------
23 22 21 20 19 18 17 16
--------
15 14 13 12 11 10 9 8
--------
76543210
-------UPDULOCK