Datasheet

1005
32117D–AVR-01/12
AT32UC3C
33.7.8 Interrupt Status Register 1
Name:
ISR1
Access Type: Read-only
Offset: 0x01C
Reset Value: 0x00000000
• FCHIDx: Fault Protection Trigger on Channel x
0: No new trigger of the fault protection since the last read of the ISR1 register.
1: At least one trigger of the fault protection since the last read of the ISR1 register.
• CHIDx: Counter Event on Channel x
0: No new counter event has occurred since the last read of the ISR1 register.
1: At least one counter event has occurred since the last read of the ISR1 register.
Note: Reading ISR1 automatically clears CHIDx and FCHIDx.
31 30 29 28 27 26 25 24
– –––––––
23 22 21 20 19 18 17 16
– – – – FCHID3 FCHID2 FCHID1 FCHID0
15 14 13 12 11 10 9 8
––––––––
76543210
– – – – CHID3 CHID2 CHID1 CHID0