Datasheet

1004
32117D–AVR-01/12
AT32UC3C
33.7.7 Interrupt Mask Register 1
Name:
IMR1
Access Type: Read-only
Offset: 0x018
Reset Value: 0x00000000
0: The corresponding interrupt is disabled.
1: The corresponding interrupt is enabled.
A bit in this register is cleared when the corresponding bit in IDR is written to one.
A bit in this register is set when the corresponding bit in IER is written to one.
31 30 29 28 27 26 25 24
– –––––––
23 22 21 20 19 18 17 16
– – – – FCHID3 FCHID2 FCHID1 FCHID0
15 14 13 12 11 10 9 8
––––––––
76543210
– – – – CHID3 CHID2 CHID1 CHID0