Datasheet

1001
32117D–AVR-01/12
AT32UC3C
33.7.4 Status Register
Name:
SR
Access Type: Read-only
Offset: 0x00C
Reset Value: 0x00000000
• CHIDx: Channel ID
0: PWM output for channel x is disabled.
1: PWM output for channel x is enabled.
31 30 29 28 27 26 25 24
- -------
23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
––––––––
76543210
– – – – CHID3 CHID2 CHID1 CHID0