Datasheet

73
AT32UC3A
• PLLOSC: PLL Oscillator Select
0: Oscillator 0 is the source for the PLL.
1: Oscillator 1 is the source for the PLL.
• PLLEN: PLL Enable
0: PLL is disabled.
1: PLL is enabled.
Table 13-6. PLLOPT Fields Description in AT32UC3A
Description
PLLOPT[0]: VCO frequency
0 160MHz<f
vco
<240MHz
1 80MHz<f
vco
<180MHz
PLLOPT[1]: Output divider
0 f
PLL
= f
vco
1 f
PLL
= f
vco
/2
PLLOPT[2]
0 Wide Bandwidth Mode enabled
1 Wide Bandwidth Mode disabled
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