Datasheet

698
AT32UC3A
32.7.14 PWM Channel Update Register
Register Name: CUPDx
Access Type: Write-only
This register acts as a double buffer for the period or the duty cycle. This prevents an unexpected waveform when modify-
ing the waveform period or duty-cycle.
Only the first 20 bits (internal channel counter size) are significant.
31 30 29 28 27 26 25 24
CUPD
23 22 21 20 19 18 17 16
CUPD
15 14 13 12 11 10 9 8
CUPD
7 6 5 4 3 2 1 0
CUPD
CPD (CMRx Register)
0
The duty-cycle (CDTY in the CDTYx register) is updated with the CUPD value at the beginning of
the next period.
1
The period (CPRD in the CPRDx register) is updated with the CUPD value at the beginning of the
next period.
32058K
AVR32-01/12