Datasheet
692
AT32UC3A
32.7.9 PWM Interrupt Status Register
Register Name: ISR
Access Type: Read-only
• CHIDx: Channel ID
0 = No new channel period since the last read of the ISR register.
1 = At least one new channel period since the last read of the ISR register.
Note: Reading ISR automatically clears CHIDx flags.
31 30 29 28 27 26 25 24
– – – – – – – –
23 22 21 20 19 18 17 16
– – – – – – – –
15 14 13 12 11 10 9 8
– – – – – – – –
7 6 5 4 3 2 1 0
– CHID6 CHID5 CHID4 CHID3 CHID2 CHID1 CHID0
32058K
AVR32-01/12