Datasheet

649
AT32UC3A
Figure 31-7. WAVSEL= 00 with trigger
31.6.3.3 WAVSEL = 10
When WAVSEL = 10, the value of CV is incremented from 0 to the value of RC, then automati-
cally reset on a RC Compare. Once the value of CV has been reset, it is then incremented and
so on. See Figure 31-8.
It is important to note that CV can be reset at any time by an external event or a software trigger
if both are programmed correctly. See Figure 31-9.
In addition, RC Compare can stop the counter clock (CPCSTOP = 1 in CMR) and/or disable the
counter clock (CPCDIS = 1 in CMR).
Figure 31-8. WAVSEL = 10 Without Trigger
Time
Counter Value
R
C
R
B
R
A
TIOB
TIOA
Counter cleared by compare match with 0xFFFF
0xFFFF
Waveform Examples
Counter cleared by trigger
Time
Counter Value
R
C
R
B
R
A
TIOB
TIOA
Counter cleared by compare match with RC
0xFFFF
Waveform Examples
32058K
AVR32-01/12