Datasheet

636
AT32UC3A
30.8.3.23 USB Host DMA Channel X Control Register (UHDMAX_CONTROL)
Offset: 0x0718 + (X - 1) . 0x10
Register Name: UHDMAX_CONTROL, X in [1..6]
Access Type: Read/Write
Reset Value: 0x00000000
Same as ”USB Device DMA Channel X Control Register (UDDMAX_CONTROL)” on page 593.
(just replace the IN endpoint term by OUT endpoint, and vice-versa)
31 30 29 28 27 26 25 24
CH_BYTE_LENGTH
rwu
0 0 0 0 0 0 0 0
23 22 21 20 19 18 17 16
CH_BYTE_LENGTH
rwu
0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8
– – – – – – – –
7 6 5 4 3 2 1 0
BURST_LOCK
_EN
DESC_LD_
IRQ_EN
EOBUFF_
IRQ_EN
EOT_IRQ_EN DMAEND_EN
BUFF_CLOSE
_IN_EN
LD_NXT_CH_
DESC_EN
CH_EN
rwu rwu rwu rwu rwu rwu rwu rwu
0 0 0 0 0 0 0 0
32058K
AVR32-01/12