Datasheet

613

AT32UC3A

30.8.3.11 USB Pipe Enable/Reset Register (UPRST)

Offset: 0x0041C

Access Type: Read/Write

Reset Value: 0x00000000

• PENX, X in [0..6]: Pipe X Enable

Set to enable the Pipe X.

Clear to disable the Pipe X, what forces the Pipe X state to inactive and resets the pipe X registers (UPCFGX, UPSTAX,

UPCONX) but not the pipe configuration (ALLOC, PBK, PSIZE).

• PRSTX, X in [0..6]: Pipe X Reset

Set by software to reset the Pipe X FIFO.

This resets the endpoint X registers (UPCFGX, UPSTAX, UPCONX) but not the endpoint configuration (ALLOC, PBK,

PSIZE, PTOKEN, PTYPE, PEPNUM, INTFRQ).

All the endpoint mechanism (FIFO counter, reception, transmission, etc.) is reset apart from the Data Toggle management

The endpoint configuration remains active and the endpoint is still enabled.

Then, clear by software to complete the reset operation and to start using the FIFO.

31 30 29 28 27 26 25 24

– – – – – – – –

23 22 21 20 19 18 17 16

– PRST6 PRST5 PRST4 PRST3 PRST2 PRST1 PRST0

rwu rwu rwu rwu rwu rwu rwu

0 0 0 0 0 0 0

15 14 13 12 11 10 9 8

– – – – – – – –

7 6 5 4 3 2 1 0

– PEN6 PEN5 PEN4 PEN3 PEN2 PEN1 PEN0

rw rw rw rw rw rw rw

0 0 0 0 0 0 0

32058K

AVR32-01/12