Datasheet

599
AT32UC3A
HWUPI: Host Wake-Up Interrupt Flag
Asynchronous interrupt.
Set by hardware in the following cases :
The Host controller is in the suspend mode (SOFE=0) and an upstream resume from
the Peripheral is detected.
The Host controller is in the suspend mode (SOFE=0) and a Peripheral disconnection
is detected.
The Host controller is in the Idle state (VBUSRQ=0, no VBus is generated), and an
OTG SRP event initiated by the Peripheral is detected.
Note that this interrupt is generated even if the clock is frozen by the FRZCLK bit.
PXINT, X in [0..6]: Pipe X Interrupt Flag
Set by hardware when an interrupt is triggered by the endpoint X (UPSTAX). This triggers a USB interrupt if the corre-
sponding pipe interrupt enable bit is set (UHINTE register). Cleared by hardware when the interrupt source is served.
DMAXINT, X in [1..6]: DMA Channel X Interrupt Flag
Set by hardware when an interrupt is triggered by the DMA channel X. This triggers a USB interrupt if the corresponding
DMAXINTE is set (UHINTE register).
Cleared by hardware when the UHDMAX_STATUS interrupt source is cleared.
32058K
AVR32-01/12