Datasheet

431
AT32UC3A
After initialization, as soon as DS field is modified and self-refresh mode is activated, the Extended Mode Register is
accessed automatically and DS bits are updated before entry in self-refresh mode.
TIMEOUT: Time to define when low-power mode is enabled
00 The SDRAM controller activates the SDRAM low-power mode immediately after the end of the last transfer.
01
The SDRAM controller activates the SDRAM low-power mode 64 clock cycles after the end of the last
transfer.
10
The SDRAM controller activates the SDRAM low-power mode 128 clock cycles after the end of the last
transfer.
11 Reserved.
32058K
AVR32-01/12