Datasheet

423
AT32UC3A
Figure 28-11. Deep Power-down Mode Behavior
SDCK
SDCS
RAS
CAS
SDRAMC_A[12:0]
D[31:0]
(input)
t
RP
= 3
SDWE
Dnb Dnc Dnd
col c col d
Row n
CKE
32058K
AVR32-01/12