Datasheet

296
AT32UC3A
25.9.15 Interrupt Disable Register
Name: IDR
Access Type: Write-only
Offset: 0x48
Reset value: -
• RXSYN: Rx Sync Interrupt Enable
0: No effect.
1: Disables the Rx Sync Interrupt.
• TXSYN: Tx Sync Interrupt Enable
0: No effect.
1: Disables the Tx Sync Interrupt.
• CP1: Compare 1 Interrupt Disable
0: No effect.
1: Disables the Compare 1 Interrupt.
• CP0: Compare 0 Interrupt Disable
0: No effect.
1: Disables the Compare 0 Interrupt.
• RXBUFF: Receive Buffer Full Interrupt Disable
0: No effect.
1: Disables the Receive Buffer Full Interrupt.
• ENDRX: End of Reception Interrupt Disable
0: No effect.
1: Disables the End of Reception Interrupt.
• OVRUN: Receive Overrun Interrupt Disable
0: No effect.
1: Disables the Receive Overrun Interrupt.
• RXRDY: Receive Ready Interrupt Disable
0: No effect.
31 30 29 28 27 26 25 24
– – – – – – – –
23 22 21 20 19 18 17 16
– – – – – – – –
15 14 13 12 11 10 9 8
– – – – RXSYN TXSYN CP1 CP0
7 6 5 4 3 2 1 0
RXBUFF ENDRX OVRUN RXRDY TXBUFE ENDTX TXEMPTY TXRDY
32058K
AVR32-01/12