Datasheet

276
AT32UC3A
25.9.1 Control Register
Name: CR
Access Type: Write-only
Offset: 0x00
Reset value: -
• SWRST: Software Reset
0: No effect.
1: Performs a software reset. Has priority on any other bit in CR.
• TXDIS: Transmit Disable
0: No effect.
1: Disables Transmit. If a character is currently being transmitted, disables at end of current character transmission.
• TXEN: Transmit Enable
0: No effect.
1: Enables Transmit if TXDIS is not set.
• RXDIS: Receive Disable
0: No effect.
1: Disables Receive. If a character is currently being received, disables at end of current character reception.
• RXEN: Receive Enable
0: No effect.
1: Enables Receive if RXDIS is not set.
31 30 29 28 27 26 25 24
– – – – – – – –
23 22 21 20 19 18 17 16
– – – – – – – –
15 14 13 12 11 10 9 8
SWRST – – – – – TXDIS TXEN
7 6 5 4 3 2 1 0
– – – – – – RXDIS RXEN
32058K
AVR32-01/12