Datasheet

175
AT32UC3A
22.5 General Purpose Input/Output (GPIO) User Interface
The GPIO controls all the I/O pins on the AVR32 microcontroller. The pins are managed as 32-
bit ports that are configurable through an PB interface. Each port has a set of configuration reg-
isters. The overall memory map of the GPIO is shown below. The number of pins and hence the
number of ports is product specific.
In the Peripheral muxing table in the Peripherals chapter each GPIO line has a unique number.
Note that the PA, PB, PC and PX ports do not directly correspond to the GPIO ports. To find the
corresponding port and pin the following formulas can be used:
GPIO port = floor((GPIO number) / 32), example: floor((36)/32) = 1
GPIO pin = GPIO number mod 32, example: 36 mod 32 = 4
The table below shows the configuration registers for one port. Addresses shown are relative to
the port address offset. The specific address of a configuration register is found by adding the
register offset and the port offset to the GPIO start address. One bit in each of the configuration
registers corresponds to an I/O pin.
Port 0 Configuration Registers
Port 1 Configuration Registers
Port 2 Configuration Registers
Port 3 Configuration Registers
Port 4 Configuration Registers
0x0000
0x0100
0x0200
0x0300
0x0400
Table 22-2. GPIO Register Map
Offset Register Function Name Access Reset value
0x00 GPIO Enable Register Read/Write GPER Read/Write
1b for each
implemented
GPIO pin in port
0x04 GPIO Enable Register Set GPERS Write-Only
0x08 GPIO Enable Register Clear GPERC Write-Only
0x0C GPIO Enable Register Toggle GPERT Write-Only
0x10 Peripheral Mux Register 0 Read/Write PMR0 Read/Write 0x00000000
32058K
AVR32-01/12