Datasheet

 2015 Microchip Technology Inc. DS20005292B-page 5
MCP2221
1.4 Device Configuration
The MCP2221 keeps all the essential device
configuration settings stored in Flash memory.
Device configuration settings affect the way the
MCP2221 behaves at run time.
The settings are stored into the Flash memory on the
device. Some of the settings are also copied into
SRAM at Power-Up/Reset.
These device configuration settings reside in the
following two distinct areas of Flash memory:
• Chip Settings
The Chip Settings area stores the key MCP2221
parameters – USB parameters, ADC/DAC
reference voltage choice, start-up DAC value,
Clock Reference output (CLKR) frequency and
duty cycle values.
• GP Settings
The GP Settings area stores the GP designation
settings. For GP settings that are assigned to
GPIO output operation, output values (logic 1 or 0)
are also specified.
Even though the MCP2221 places a partial copy of the
Chip Settings in SRAM, the following Chip Settings
always reside in Flash:
• USB Manufacturer/Product and Serial Number
descriptors
• USB VID and PID pair
• USB options (e.g., the requested amount of
current that is presented to the USB host during
the USB enumeration process)
1.4.1 POWER-UP/RESET DEVICE
CONFIGURATION BEHAVIOR
At Power-Up/Reset, the MCP2221 configures the
device options (GP designation, special function pins
parameters and USB enumeration options) according
to the Flash settings. Then, the Flash Chip Settings and
GP Settings are loaded into SRAM to allow for their
temporary modification at run time.
Chip Settings of the Device Configuration Flash is
copied partially into SRAM. Only the run-
time-modifiable parameters are copied into SRAM.
GP Settings of the Device Configuration Flash (GP
settings area) are copied entirely into the SRAM. By
copying the GP settings completely into SRAM, the
user is allowed to completely change the GP
designation at run time.
The SRAM copy of the settings can be altered at run
time in order to change certain device behavior, e.g.,
GP designation (the GPs can be re-assigned for a
different type of operation than the one assigned at
Power-Up) and special parameters (DAC value,
ADC/DAC voltage references, Clock output value).
FIGURE 1-1: CHIP SETTINGS RUN
TIME MANAGEMENT
The SRAM settings (GP and partial Chip Settings) can
be modified through USB HID commands and they will
have an effect on the following device features:
• GP pin designation (switch between GPIO,
dedicated or special functions modes)
• GPIO direction and output value (only for GPIO
outputs) – for the GPs assigned to work in GPIO
mode
• Clock Output duty cycle and value – if GP1 is
assigned for CLKR mode (Clock Reference
output mode), by modifying the SRAM settings,
the clock frequency and duty cycle can be
changed at run time
• DAC value and voltage reference used – the DAC
value setting as well as the voltage reference
used for it are stored in SRAM settings and they
can be changed at run time. Through this
mechanism, at run time the user can change the
DAC value, as well as the voltage reference.
• ADC voltage reference value – the voltage
reference used for ADC conversions can be
changed by altering its corresponding SRAM
setting
• Interrupt-On-Change (IOC) detector settings – if
GP1 is assigned for IOC mode, the SRAM
settings are used for setting up the triggers used
for external interrupt detection (positive, negative
edge detection or both)
Copy FLASH Chip and
GP settings to SRAM
USB enumeration
& configuration
complete
Change the
SRAM settings
Power-Up/Reset
changes needed
No Yes
SRAM settings