Datasheet

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2. Block Diagram

Figure 2-1. ATWINC15x0-MR210xB Module Block Diagram

BAL UN

RX/TX

26

MHz

GN D

SPI_CFG

SPI

GPIO 4

GPIO 5

GPIO 6

IRQN

Chip_EN

WAKE

RESET

VBAT

VDDIO

GPIO 3

crystal

Printed 2.4 GHz Antenna

or

u.FL 2.4 GHz External

Antenna Connector

®

Wi-Fi

SoC

ATWINC15x0

ATWINC15x0

Block Diagram

© 2018 Microchip Technology Inc.

Datasheet

DS70005304C-page 7