Datasheet

ManualsBrandsMicrochip ManualsEEPROMEEPROM 2KB NSOIC

 2003 Microchip Technology Inc. DS21794B-page 1

93AA56A/B/C, 93LC56A/B/C,

93C56A/B/C

Device Selection Table

Features

• Low-power CMOS technology

• ORG pin to select word size for ‘56C version

• 256 x 8-bit organization ‘A’ ver. devices (no ORG)

• 128 x 16-bit organization ‘B’ ver. devices (no

ORG)

• Self-timed ERASE/WRITE cycles (including

auto-erase)

• Automatic ERAL before WRAL

• Power on/off data protection circuitry

• Industry standard 3-wire serial I/O

• Device Status signal (READY/BUSY)

• Sequential READ function

• 1,000,000 E/W cycles

• Data retention > 200 years

• Temperature ranges supported:

Pin Function Table

Description

The Microchip Technology Inc. 93XX56A/B/C devices

are 2K bit low voltage serial Electrically Erasable

PROMs (EEPROM). Word-selectable devices such as

the 93AA56C, 93LC56C or 93C56C are dependent

upon external logic levels driving the ORG pin to set

word size. For dedicated 8-bit communication, the

93AA56A, 93LC56A or 93C56A devices are available,

while the 93AA56B, 93LC56B and 93C56B devices

provide dedicated 16-bit communication. Advanced

CMOS technology makes these devices ideal for low

power, nonvolatile memory applications. The entire

93XX Series is available in standard packages includ-

ing 8-lead PDIP and SOIC, and advanced packaging

including 8-lead MSOP, 6-lead SOT-23, and 8-lead

TSSOP. Pb-free (Pure Matte Sn) finish is also

available.

Package Types (not to scale)

Part Number VCC Range ORG Pin Word Size Temp Ranges Packages

93AA56A 1.8-5.5 No 8-bit I P, SN, ST, MS, OT

93AA56B 1.8-5-5 No 16-bit I P, SN, ST, MS, OT

93LC56A 2.5-5.5 No 8-bit I, E P, SN, ST, MS, OT

93LC56B 2.5-5.5 No 16-bit I, E P, SN, ST, MS, OT

93C56A 4.5-5.5 No 8-bit I, E P, SN, ST, MS, OT

93C56B 4.5-5.5 No 16-bit I, E P, SN, ST, MS, OT

93AA56C 1.8-5.5 Yes 8 or 16-bit I P, SN, ST, MS

93LC56C 2.5-5.5 Yes 8 or 16-bit I, E P, SN, ST, MS

93C56C 4.5-5.5 Yes 8 or 16-bit I, E P, SN, ST, MS

- Industrial (I) -40°C to +85°C

- Automotive (E) -40°C to +125°C

Name Function

CS Chip Select

CLK Serial Data Clock

DI Serial Data Input

DO Serial Data Output

VSS Ground

NC No internal connection

ORG Memory Configuration

CC Power Supply

CLK

ORG*

PDIP/SOIC

(P, SN)

CLK

ORG*

ROTATED SOIC

(ex: 93LC56BX)

TSSOP/MSOP

CLK

ORG*

(ST, MS)

SOT-23

CLK

(OT)

* ORG pin is NC on A/B devices

2K Microwire Compatible Serial EEPROM

Summary of content (25 pages)

PAGE 1
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2K Microwire Compatible Serial EEPROM Device Selection Table Part Number VCC Range ORG Pin Word Size Temp Ranges Packages 93AA56A 1.8-5.5 No 8-bit I P, SN, ST, MS, OT 93AA56B 1.8-5-5 No 16-bit I P, SN, ST, MS, OT 93LC56A 2.5-5.5 No 8-bit I, E P, SN, ST, MS, OT 93LC56B 2.5-5.5 No 16-bit I, E P, SN, ST, MS, OT 93C56A 4.5-5.5 No 8-bit I, E P, SN, ST, MS, OT 93C56B 4.5-5.5 No 16-bit I, E P, SN, ST, MS, OT 93AA56C 1.8-5.
PAGE 2
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings(†) VCC .............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V Storage temperature .....................................................
PAGE 3
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C TABLE 1-2: AC CHARACTERISTICS All parameters apply over the specified ranges unless otherwise noted. Param. Symbol No. Parameter VCC = range by device (see Table on Page 1) Industrial (I): TA = -40°C to +85°C Automotive (E): TA = -40°C to +125°C Min Max Units Conditions A1 FCLK Clock frequency — 3 2 1 MHz MHz MHz 4.5V ≤ VCC < 5.5V, 93XX56C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V A2 TCKH Clock high time 200 250 450 — ns ns ns 4.5V ≤ VCC < 5.
PAGE 4
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C FIGURE 1-1: CS SYNCHRONOUS DATA TIMING VIH TCSS VIL TCKH TCKL TCSH VIH CLK VIL TDIS TDIH VIH DI VIL TPD TPD DO (READ) VOH VOL TCZ TSV DO VOH (PROGRAM) VOL Note: TCZ STATUS VALID TSV is relative to CS. TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX56B OR 93XX56C WITH ORG = 1) Instruction SB Opcode Address Data In Data Out Req.
PAGE 5
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.0 FUNCTIONAL DESCRIPTION 2.2 Data In/Data Out (DI/DO) When the ORG* pin is connected to VCC, the (x16) organization is selected. When it is connected to ground, the (x8) organization is selected. Instructions, addresses and write data are clocked into the DI pin on the rising edge of the clock (CLK). The DO pin is normally held in a HIGH-Z state except when reading data from the device, or when checking the READY/ BUSY status during a programming operation.
PAGE 6
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.4 ERASE The DO pin indicates the READY/BUSY status of the device if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical ‘0’ indicates that programming is still in progress. DO at logical ‘1’ indicates that the register at the specified address has been erased and the device is ready for another instruction. The ERASE instruction forces all data bits of the specified address to the logical ‘1’ state.
PAGE 7
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.5 ERASE ALL (ERAL) The DO pin indicates the READY/BUSY status of the device, if CS is brought high after a minimum of 250 ns low (TCSL). The Erase All (ERAL) instruction will erase the entire memory array to the logical ‘1’ state. The ERAL cycle is identical to the ERASE cycle, except for the different opcode.
PAGE 8
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.6 ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN) The 93XX56A/B/C powers up in the ERASE/WRITE Disable (EWDS) state. All Programming modes must be preceded by an ERASE/WRITE Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruction is executed or Vcc is removed from the device.
PAGE 9
3AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.8 WRITE The DO pin indicates the READY/BUSY status of the device, if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical ‘0’ indicates that programming is still in progress. DO at logical ‘1’ indicates that the register at the specified address has been written with the data specified and the device is ready for another instruction.
PAGE 10
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 2.9 WRITE ALL (WRAL) automatic ERAL cycle for the device. Therefore, the WRAL instruction does not require an ERAL instruction but the chip must be in the EWEN status. The Write All (WRAL) instruction will write the entire memory array with the data specified in the command. For 93AA56A/B/C and 93LC56A/B/C devices, after the last data bit is clocked into DI, the falling edge of CS initiates the self-timed auto-erase and programming cycle.
PAGE 11
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 3.0 PIN DESCRIPTIONS TABLE 3-1: 3.
PAGE 12
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 4.0 PACKAGING INFORMATION 4.
PAGE 13
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) E E1 p D 2 B n 1 α A2 A c φ A1 (F) L β Units Dimension Limits n p MIN INCHES NOM MAX MILLIMETERS* NOM 8 0.65 BSC 0.75 0.85 0.00 4.90 BSC 3.00 BSC 3.00 BSC 0.40 0.60 0.95 REF 0° 0.08 0.22 5° 5° - MIN 8 Number of Pins Pitch .026 BSC A .043 Overall Height A2 Molded Package Thickness .030 .033 .037 A1 .000 .006 Standoff E Overall Width .193 TYP. E1 .118 BSC Molded Package Width D .
PAGE 14
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 6-Lead Plastic Small Outline Transistor (OT) (SOT-23) E E1 B p1 n D 1 α c A A2 φ L β Units Dimension Limits n p MIN A1 INCHES* NOM MAX MILLIMETERS NOM 6 0.95 1.90 0.90 1.18 0.90 1.10 0.00 0.08 2.60 2.80 1.50 1.63 2.80 2.95 0.35 0.45 0 5 0.09 0.15 0.35 0.43 0 5 0 5 MIN Number of Pins 6 Pitch .038 p1 Outside lead pitch (basic) .075 Overall Height A .035 .046 .057 Molded Package Thickness .035 .043 .051 A2 Standoff .000 .003 .006 A1 Overall Width E .102 .
PAGE 15
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) E1 D 2 n 1 α E A2 A L c A1 β B1 p eB B Units Dimension Limits n p Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A
PAGE 16
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) E E1 p D 2 B n 1 α h 45° c A2 A φ β L Units Dimension Limits n p Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D h L φ c B α β MIN .053 .052 .004 .
PAGE 17
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) E E1 p D 2 1 n B α A c φ β A1 A2 L Units Dimension Limits n p Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D L φ c B α β MIN INCHES NOM MAX 8 .026 .033 .
PAGE 18
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C APPENDIX A: REVISION HISTORY Revision B Corrections to Section 1.0, Electrical Characteristics. Section 4.1, 6-Lead SOT-23 package to OT. DS21794B-page 18  2003 Microchip Technology Inc.
PAGE 19
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C ON-LINE SUPPORT Microchip provides on-line support on the Microchip World Wide Web site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape® or Microsoft® Internet Explorer. Files are also available for FTP download from our FTP site.
PAGE 20
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document.
PAGE 21
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X X Pinout Tape & Reel Temperature Range Device /XX X Package X Lead Finish 93AA56A: 2K 1.8V Microwire Serial EEPROM 93AA56B: 2K 1.8V Microwire Serial EEPROM 93AA56C: 2K 1.8V Microwire Serial EEPROM w/ORG 93LC56A: 2K 2.5V Microwire Serial EEPROM 93LC56B: 2K 2.5V Microwire Serial EEPROM 93LC56C: 2K 2.
PAGE 22
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C NOTES: DS21794B-page 22  2003 Microchip Technology Inc.
PAGE 23
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 24
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