Datasheet
2007-2019 Microchip Technology Inc. DS20001709L-page 12
24AA02/24LC02B/24FC02
8.0 READ OPERATION
Read operations are initiated in the same way as write
operations, with the exception that the R/
W bit of the
slave address is set to ‘
1’. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1 Current Address Read
The 24XX02 contains an Address Pointer that
maintains the address of the last word accessed,
internally incremented by one. Therefore, if the previ-
ous access (either a read or write operation) was to
address
n, the next current address read operation
would access data from address
n + 1. Upon receipt of
the slave address with R/
W bit set to ‘1’, the 24XX02
issues an acknowledge and transmits the 8-bit data
word. The master will not acknowledge the transfer, but
does generate a Stop condition and the 24XX02
discontinues transmission (Figure 8-1).
8.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is accomplished by sending the word
address to the 24XX02 as part of a write operation.
Once the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the inter-
nal Address Pointer is set. The master then issues the
control byte again, but with the R/
W bit set to a ‘1’. The
24XX02 will then issue an acknowledge and transmits
the 8-bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24XX02 discontinues transmission (Figure 8-2).
8.3 Sequential Read
Sequential reads are initiated in the same way as a
random read, except that once the 24XX02 transmits
the first data byte, the master issues an acknowledge
(as opposed to a Stop condition in a random read). This
directs the 24XX02 to transmit the next sequentially
addressed 8-bit word (Figure 8-3).
To provide sequential reads the 24XX02 contains an
internal Address Pointer which is incremented by one
at the completion of each operation. This Address
Pointer allows the entire memory contents to be serially
read during one operation.
8.4 Noise Protection
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation even on a noisy bus.
FIGURE 8-1: CURRENT ADDRESS READ
SP
Bus Activity
Master
SDA Line
Bus Activity
S
T
O
P
Control
Byte
Data (n)
A
C
K
N
o
A
C
K
S
T
A
R
T
Block
Select
Bits
x = “don’t care”
1010
xxx
1