Datasheet

24AA02E48/24AA025E48
DS22124D-page 12  2010 Microchip Technology Inc.
FIGURE 8-2: RANDOM READ
FIGURE 8-3: SEQUENTIAL READ
S P
S
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
R
T
S
T
O
P
Control
Byte
A
C
K
Word
Address (n)
Control
Byte
S
T
A
R
T
Data (n)
A
C
K
A
C
K
N
o
A
C
K
1
0
10
A2A1A0
0
1
0
10
1
Chip
Select
Bits
Chip
Select
Bits
Note: * Bits A0, A1 and A2 are “don’t cares” for the 24AA02E48.
***
*
**
A2
A1
A0
P
Bus Activity
Master
SDA Line
Bus Activity
S
T
O
P
Control
Byte
A
C
K
N
o
A
C
K
Data (n) Data (n + 1) Data (n + 2) Data (n + x)
A
C
K
A
C
K
A
C
K
1