User`s guide
MPLAB
®
IDE User’s Guide
DS51519B-page 76 © 2006 Microchip Technology Inc.
• The Extended Microcontroller mode allows access to both internal and external
program memories as a single block. The device can access its entire on-chip
program memory; above this, the device accesses external program memory up
to the program counter accessible limit (see Section 5.2.4 “Program Counter”).
Execution automatically switches between the two memories, as required.
In all modes, the device has complete access to data RAM. For more information,
consult the device data sheet section “Memory Organization”.
5.2.2 PIC18F6XXX/8XXX Program Memory Modes
Certain PIC18F6XXX/8XXX devices are capable of operating in any one of several
Program Memory modes, using combinations of on-chip and external program
memory. Please see the data sheet for your device to determine if it supports external
memory.
For supported devices, available Program Memory modes are as follows:
• The Microprocessor mode permits access only to external program memory; the
contents of the on-chip Flash memory are ignored. The program counter permits
access to a linear program memory space and defines the amount of accessible
program memory (see Section 5.2.4 “Program Counter”).
• The Microprocessor with Boot Block mode accesses on-chip Flash memory
from address 000000h to the end of the boot block. Above this, external program
memory is accessed all the way up to the program counter accessible limit (see
Section 5.2.4 “Program Counter”). Program execution automatically switches
between the two memories, as required.
• The Microcontroller mode accesses only on-chip Flash memory. Attempts to
read above the physical limit of the on-chip Flash causes a read of all ‘0’s (a NOP
instruction).
• The Extended Microcontroller mode allows access to both internal and external
program memories as a single block. The device can access its entire on-chip
Flash memory; above this, the device accesses external program memory up to
the program counter accessible limit (see Section 5.2.4 “Program Counter”). As
with Boot Block mode, execution automatically switches between the two
memories, as required.
In all modes, the device has complete access to data RAM and EEPROM. For more
information, consult the device data sheet section “Memory Organization”.
5.2.3 PIC18C601/801 ROMless Devices
For PIC18C601/801 devices, all program memory address space is external. The
on-chip program counter permits access to a linear program memory space and
defines the amount of accessible program memory (see Section 5.2.4 “Program
Counter”).
There is a provision for configuring the last 512 bytes of general purpose user RAM as
program memory, called “Boot RAM”. See the device data sheet for more information.
5.2.4 Program Counter
The size of the program counter will determine how much program memory can be
accessed, e.g., a 21-bit program counter permits access to a 2-Mbyte (1-Mword)
program memory space (on-chip, off-chip or a combination of both types of program
memory).