User`s guide

MPLAB
®
IDE User’s Guide
DS51519B-page 220 © 2006 Microchip Technology Inc.
16.4 SIMULATOR EXECUTION
MPLAB SIM operation is specified in the following topics.
• Execution Speed
• Execution on Instruction Cycle Boundaries
• I/O Timing
16.4.1 Execution Speed
When MPLAB SIM is simulating running in real time, instructions are executing as
quickly as the PC's CPU will allow. This is usually slower than the actual device would
run at its rated clock speed.
The speed at which the simulator runs depends on the speed of your computer and
how many other tasks you have running in the background. The software simulator
must update all of the simulated registers and RAM, as well as monitor I/O, set and
clear flags, check for break and trace points in software and simulate the instruction
with instructions being executed on your computer's CPU.
The execution speed of a discrete-event software simulator is orders of magnitude less
than a hardware oriented solution. Slower execution speed may be viewed as a
handicap or as a tool. The simulator attempts to provide the fastest possible simulation
cycle, and depending upon the mode of operation, can operate on the order of
milliseconds per instruction.
Turning off simulator trace will increase simulation speed by up to 50%. Therefore, use
the tracing function only as needed. See Section 17.3 “Using Simulator Trace”.
In general, when this discussion says “real time” and you are in the simulator mode, the
software simulation is executing simulated code as fast as your PC can simulate the
instructions.
16.4.2 Execution on Instruction Cycle Boundaries
The simulator executes on instruction cycle boundaries, and resolutions shorter than
one instruction cycle (T
CY) can not be simulated. The simulator is a discrete-event
simulator where all stimuli are evaluated, and all responses are generated, at instruc-
tion boundaries, or T
CY = 4*Tosc, where Tosc is the input clock period. Therefore, some
physical events can not be accurately simulated. These fall into the following
categories:
• Purely asynchronous events
• Events that have periods shorter than one instruction cycle
The net result of instruction boundary simulation is that all events get synchronized at
instruction boundaries, and events smaller than one instruction cycle are not
recognized.
Note: Often loops will be used in your code to generate timing delays. When using
the simulator, you might wish to decrease these time delays or conditionally
remove those sections of your code with “IFDEF” statements to increase
simulation speed.