User`s guide

Simulator Overview
© 2006 Microchip Technology Inc. DS51519B-page 219
16.3.6.4 PERIPHERALS
MPLAB SIM supports the following peripherals:
• Input Capture/Output Compare
• Change Notify
• Interrupts
• OSC control of IO
•Timers
•Ports
•Comparators
•PWM
• A/D Converter (Limited)
• UART (Limited)
The delays are implemented on all peripherals, but the interrupt latency is not.
A/D Converter (Limited)
All the registers, timing function and interrupt generation are implemented. The
simulator, however, does not load any meaningful value into the A/D result buffer
(ADCBUF) at the end of a conversion.To load meaningful data at the end of a
conversion, use an injection file (see Section 18.2.5 “Register Injection”).
Because simulation is to the register level, and not the pin level, bit/pin names will be
read as ‘0’, as required for analog, although injected stimulus may have actually
changed the value to ‘1’.
UART (Limited)
The following limitations apply to UART operations:
• The receiver register must be stimulated using a message-based stimulus file.
The characters are clocked into the receiver register at the default or current baud
rate, starting at the time defined within the message-based stimulus file. If the
receiver is not enabled when the data starts arriving, the data is lost. If the
receiver is enabled the characters are read into the FIFO buffer until the FIFO is
full. If the characters in the FIFO are not read out in time the remaining characters
in the stimulus file will be lost and the OV status bit will be set.
• The transmitter register must be captured using an on-demand stimulus file.
When the transmitter is enabled, characters written to the transmitter register are
clocked into the transmitter FIFO at the current baud rate. When a character
becomes available in the FIFO, it is written to the on-demand response file.
• The receiver and transmitter FIFOs are not visible to the user.
• Certain errors can occur due to the fact that the receiver register is stimulated
from an on-demand file. They are: parity error, framing error and receiver buffer
overrun error.
Note: If you have trouble with I/O pins on processors that have A/D, make certain
that the ADPCFG and TRIS registers are configuring those pins for digital
I/O rather than for analog input. For most processors, these default to
analog inputs and the associated pins cannot be used for I/O until these
registers are set properly.