User Manual
Table Of Contents
- Introduction
- Features
- Table of Contents
- 1. Ordering Information and Module Marking
- 2. Block Diagram
- 3. Pinout and Package Information
- 4. Electrical Characteristics
- 5. Power Management
- 6. Clocking
- 7. CPU and Memory Subsystem
- 8. WLAN Subsystem
- 9. Bluetooth Low Energy 4.0
- 10. External Interfaces
- 11. Application Reference Design
- 12. Module Outline Drawings
- 13. Design Consideration
- 14. Reflow Profile Information
- 15. Module Assembly Considerations
- 16. Regulatory Approval
- 17. Reference Documentation
- 18. Document Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Microchip Devices Code Protection Feature
- Legal Notice
- Trademarks
- Quality Management System Certified by DNV
- Worldwide Sales and Service
Pin # Pin Name Pin Type Description
16 UART_TXD Digital I/O,
Programmable pull up
• Wi-Fi UART TxD output pin.
• Used only for debug development
purposes. It is recommended to add a
test point for this pin.
17 UART_RXD Digital I/O,
Programmable pull up
• Wi-Fi UART RxD input pin.
• Used only for debug development
purposes. It is recommended to add a
test point for this pin.
18 VBAT Power Power supply pin for DC/DC converter and PA.
19 CHIP_EN Digital Input • PMU enable pin.
• When the CHIP_EN pin is asserted high,
the module is enbled. When the
CHIP_EN pin is asserted low, the module
is disabled or put into Power-Down mode.
• Connect to a host output that is low by
default at power-up. If the host output is
tri-stated, add a 1 MOhm pull down
resistor if necessary to ensure a low level
at power-up.
20 RTC_CLK Digital I/O,
Programmable pull up
• RTC Clock input pin.
• This pin must connect to a 32.768 kHz
clock source.
21 GND GND Ground pin.
22 GPIO8 Digital I/O,
Programmable pull up
General Purpose Input/Output pin.
23 SPI_SCK Digital I/O,
Programmable pull up
SPI clock pin.
24 SPI_MISO Digital I/O,
Programmable pull up
SPI MISO (Master In Slave Out) pin.
25 SPI_SSN Digital I/O,
Programmable pull up
Active-low SPI SSN (Slave Select) pin.
26 SPI_MOSI Digital I/O,
Programmable pull up
SPI MOSI (Master Out Slave In) pin.
27 GPIO7 Digital I/O,
Programmable pull up
General Purpose Input/Output pin.
28 GND GND Ground pin.
29 GPIO17 Digital I/O,
Programmable pull up
General Purpose Input/Output pin.
30 GPIO18 Digital I/O,
Programmable pull up
General Purpose Input/Output pin.
ATWINC3400-MR210CA
© 2017 Microchip Technology Inc.
Draft Datasheet Preliminary
DS00000000A-page 9